Function w4a16_gemm_n128_m128_v2 

pub fn w4a16_gemm_n128_m128_v2(
    gpu: &dyn GpuBackend,
    kernel: KernelHandle,
    input: DevicePtr,
    weight: &QuantizedWeight,
    output: DevicePtr,
    m: u32,
    n: u32,
    k: u32,
    stream: u64,
) -> Result<()>

2026-09-25: W4A16 GEMM v2 (w4a16_gemm_t_m128_v2, in the minimax-m2-229b and qwen3.6-27b kernel dirs): the CTA tile of w4a16_gemm_n128_m128 (M=128, N=128, K step 32) on 256 threads instead of 128. Warps 0-3 compute the first 64 rows and warps 4-7 the second, so the two chunks’ MMAs run in parallel.