pub fn fp8_gemv_rowscale_batch8_rt2(
gpu: &dyn GpuBackend,
kernel: KernelHandle,
input: DevicePtr,
weight: &Fp8DenseWeight,
output: DevicePtr,
m: u32,
n: u32,
k: u32,
stream: u64,
) -> Result<()>Expand description
2026-09-25: Register-tiled row-scaled FP8 GEMV for up to 8 rows, two
outputs per 64-lane group (kernel fp8_gemv_rowscale_batch8_rt2, module
fp8_gemv_rt). input [M, K] BF16, output [M, N] BF16; the kernel
applies row_scale[n] at write-out. The DFlash drafter’s FP8 path calls it
(dflash_head/forward_block.rs). Refuses m outside 1..=8 and a k
that is not a multiple of 16.