Struct Glm5NextDsaKernels 

pub struct Glm5NextDsaKernels {
    pub kpool_compress: KernelHandle,
    pub compact_pools: KernelHandle,
    pub index_scores: KernelHandle,
    pub topk_pools: KernelHandle,
    pub expand_selection: KernelHandle,
    pub k_norm: KernelHandle,
    pub write_geom: KernelHandle,
    pub indexer_store: KernelHandle,
    pub topk_to_mask: KernelHandle,
    pub mla_masked_attn: KernelHandle,
}

2026-09-25: The DSA selection kernels, the indexer LayerNorm and the two oracle kernels.

All but write_geom and indexer_store are resolved with kernel(), so a missing entry point fails resolve; those two use try_kernel and may be KernelHandle(0).

Fields

kpool_compress: KernelHandle

compact_pools: KernelHandle

index_scores: KernelHandle

topk_pools: KernelHandle

expand_selection: KernelHandle

k_norm: KernelHandle

2026-09-25: indexer.k_norm, a LayerNorm with a bias: nllb_layernorm_bf16, in place, taking (x, weight, bias, rows, dim, eps). An RMSNorm kernel would drop both the mean subtraction and the bias, and the shapes would not show it.

write_geom: KernelHandle

2026-09-25: Derives the selector geometry on the device from seq_len, so a captured graph replays over the live context. When it or indexer_store is missing, Glm5NextDsaLayer::decode_k does not take the replay-safe path.

indexer_store: KernelHandle

2026-09-25: Copies the staged indexer row to a device-side position and marks it valid.

topk_to_mask: KernelHandle

2026-09-25: Oracle only; no code under src/ launches it. See MASKED_ATTN_MAX_KEYS.

mla_masked_attn: KernelHandle

2026-09-25: Oracle only; no code under src/ launches it. See MASKED_ATTN_MAX_KEYS.

Implementations

impl Glm5NextDsaKernels

pub fn resolve(gpu: &dyn GpuBackend) -> Result<Self>

Trait Implementations

impl Clone for Glm5NextDsaKernels

fn clone(&self) -> Glm5NextDsaKernels

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Glm5NextDsaKernels