Module gaps

Module gaps 

Source
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2026-09-30: The Venn/gap table of one plan on one device: every node of the mode’s section, grouped by site (a template node across its layers), classified against the families the device can run, and ranked by its share of the device’s estimated step time.

Owner: metrale-circuit (hardware). Invariants:

  • One classifier: venn::classify::classify_node, over the class’s families (points re-resolved on the class, evidence only where measured on it). A planned group is classified through its kernels; a placeholder group through the families that implement the op, and is Novel when none does.
  • A site’s execution line states how the device runs the node’s DECLARED formats (super::exec); nothing is re-planned at a wider format.
  • Flags are plan groups that loop per row at more than one row, and the layer loops the families manifest records for the engine’s code ([[legacy_path]]), each costed as the time the loop adds over one multi-row launch; the step estimate includes that time.

Structs§

Flag
2026-09-30: A group that loops per row.
GapRow
2026-09-30: One site.
GapTable
2026-09-30: One plan’s table.

Functions§

gap_table
2026-09-30: Build the table of planned for the circuit c under settings on r.